1. Field of the Invention
The present invention is related to a testing apparatus, and more particularly, to a testing apparatus with high efficiency and high accuracy.
2. Description of the Prior Art
The variety and number of electronic devices increase with the rapid development of technology. The manufacturing process of each component in these electronic devices during mass production includes circuit design, wafer fabrication/testing, device packaging/testing, and product assembly, etc. Device testing is an essential stage since it screens out defects at the early phase of production so as to reduce manufacturing cost and to guarantee the quality of the final product. Normally, a test flow proceeds by disposing a device under test (DUT) on a test board. The test signals generated by a tester are then transmitted to the DUT via the test board and the test results can thus be recorded. The test board normally includes a plurality of functional holes for containing chips or other electronic devices, or for serving as signal terminals. According to the type of the DUT, traces are fabricated on the test board based on a specific circuit layout so that the functional holes for containing the DUT can be electrically connected to those for transmitting signals.
Reference is made to FIG. 1 for a top-view diagram illustrating a prior art testing apparatus 100. The testing apparatus 100 includes a test board 10 and a holder 16. The holder 10 is disposed on the test board 10 and includes a plurality of jacks. The number and arrangement of the jacks are designed according to the pin layout of a specific DUT. Multiple public test channels 15, disposed on the peripheral region of the test board 10, are electrically connected to the jacks of the holder 16 via a plurality of traces 18. Therefore, by disposing the DUT into the holder 16, test signals generated by a tester can be transmitted to the DUT via the public test channels 15, the traces 18 and the holder 16. The prior art testing apparatus 100, customerized for a specific DUT, can not be applied to other types of DUTs. However, various types of electronic devices have different circuit designs, product specifications or operational modes. Due to the high expense of the test boards, it is impractical to use a tailor-made test board 10 for each type of DUT in mass production.
References are made to FIGS. 2 and 3 for a top-view diagram and a bottom-view diagram illustrating another prior art testing apparatus 200. The testing apparatus 200 includes a public test board 20 and a holder 26. The holder 26 is disposed on the public test board 20 and includes a plurality of sockets and pins. The number and arrangement of the sockets and the pins are designed according to the pin layout of a specific DUT. The public test board 20 includes 4 public test channel sets 21-24 and a plurality of connecting terminals 25. Each of the public test channel sets 21-24, disposed in the peripheral region of the public test board 20 in a symmetrical manner, includes a plurality of public signal terminals for receiving the test signals transmitted from the tester. The connecting terminals 25 are disposed in the central region of the public test board 20. Prior to performing tests, the pins of the holder 26 are welded onto appropriate connecting terminals 25. The connecting terminals 25 containing the pins of the holder 26 are then electrically connected to appropriate public signal terminals among the public test channels 21-24 via the manually-welded wires 28. Therefore, by inserting the DUT into the holder 26, the test signals generated by the tester can be transmitted to the DUT via the public test channels 21-24, the wires 28 and the holder 26.
The prior art testing apparatus 200 having the plurality of connecting terminals 25 can be applied to the holders 26 which are designed for various types of DUTs. However, the wires 28 need to be manually welded before testing different types of DUTs. Not only time—and labor—consuming, the quality of manual welding also largely influences the accuracy of the test. Meanwhile, since the public signal terminals in the public test channel sets 21-24 have a symmetrical arrangement, only one of the public test channel sets 21-24 is required for testing a specific DUT. However, since the manually-welded wires 28 occupy large space, there may not be sufficient space in the testing apparatus 200 for containing multiple holders 26. In order to test multiple DUTs simultaneously, the wires 28 may have a very complicated arrangement which lengthens the welding process and increases the time for subsequent debugging. The prior art testing apparatus 200 requires highly-sophisticated welding techniques, consumes more labor and provides low test efficiency.